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author	Igor Breger <igor.breger@intel.com>
	Thu, 21 Jan 2016 14:18:11 +0000 (14:18 +0000)
committer	Igor Breger <igor.breger@intel.com>
	Thu, 21 Jan 2016 14:18:11 +0000 (14:18 +0000)
commit	bf54802a5ce32d55fcd5537cccd7eacb1d4e5e28
tree	60daaf339950b79da8f023c009acc8e9351f0680	tree \| snapshot
parent	8bb1fe71a68e6ef0a978ae3dedc065dbbc15a0f3	commit \| diff

AVX512: Masked move intrinsic implementation.
Implemented intrinsic for the follow instructions (reg move) : VMOVDQU8/16, VMOVDQA32/64, VMOVAPS/PD.

Differential Revision: http://reviews.llvm.org/D16316

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258398 91177308-0d34-0410-b5e6-96231b3b80d8

13 files changed:

external/llvm

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include/llvm/IR/IntrinsicsX86.td		diff \| blob \| history
lib/Target/X86/X86InstrAVX512.td		diff \| blob \| history
lib/Target/X86/X86IntrinsicsInfo.h		diff \| blob \| history
test/CodeGen/X86/avx512-calling-conv.ll		diff \| blob \| history
test/CodeGen/X86/avx512-ext.ll		diff \| blob \| history
test/CodeGen/X86/avx512-intrinsics.ll		diff \| blob \| history
test/CodeGen/X86/avx512-mask-op.ll		diff \| blob \| history
test/CodeGen/X86/avx512-vbroadcast.ll		diff \| blob \| history
test/CodeGen/X86/avx512-vec-cmp.ll		diff \| blob \| history
test/CodeGen/X86/avx512bw-intrinsics.ll		diff \| blob \| history
test/CodeGen/X86/avx512bwvl-intrinsics.ll		diff \| blob \| history
test/CodeGen/X86/avx512vl-intrinsics.ll		diff \| blob \| history
test/CodeGen/X86/vector-shuffle-v1.ll		diff \| blob \| history