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(parent: 6ad831e) | patch
target/riscv: Simplify check for EEW = 64 in trans_rvv.c.inc
authorWeiwei Li <liweiwei@iscas.ac.cn>
Wed, 15 Feb 2023 02:05:38 +0000 (10:05 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 1 Mar 2023 23:17:56 +0000 (15:17 -0800)
commitc1027460dcbb782ea69a2c2d2dd8c53b4b3a625f
tree67da442572779199c7877ebc0fc51c59523eac8ftree | snapshot
parent6ad831ebf142ba971c5e4cb29c52b1c0c92c259bcommit | diff
target/riscv: Simplify check for EEW = 64 in trans_rvv.c.inc

Only V extension supports EEW = 64 in these cases: Zve64* extensions don't
support EEW = 64 in these cases as commented before the check.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230215020539.4788-14-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
target/riscv/insn_trans/trans_rvv.c.inc diff | blob | history
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