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(parent: 2dca922) | patch
pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf
authorDavid Wu <david.wu@rock-chips.com>
Sat, 30 Sep 2017 12:13:20 +0000 (20:13 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Sat, 7 Oct 2017 10:30:16 +0000 (12:30 +0200)
commitc437f65c42d2640ababace37eb89bff2395c1dc3
treea0720aa47969cc867dfcc1a53d37cf96aa310041tree | snapshot
parent2dca9227d356f77d1f6372db213e0446c972a79dcommit | diff
pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf

The offset of gpio0 and gpio1 bank drive strength is 0x8, not 0x4.
But the mux is 0x4, we couldn't use the IOMUX_WIDTH_4BIT flag, so
we give them actual offset.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-rockchip.c diff | blob | history
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