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drm/i915/display/adl_p: Implement Wa_16011303918
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 16 Jun 2021 20:31:57 +0000 (13:31 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Thu, 24 Jun 2021 23:01:43 +0000 (16:01 -0700)
commitc4449742a7c2c4f565cef5604738cfcb29769db9
tree78f12a5196ffe67a7b4b6bf4db60a9ee4c7bc0da
parent61e887329e337694f3c8ac726c9e9c08e5569e5d
drm/i915/display/adl_p: Implement Wa_16011303918

PSR2 is not compatible with DC3CO or VRR in this stepping, so not
enabling PSR2 if VRR will be enabled or not enabling DC3CO if PSR2 is
possible.

BSpec: 54369
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-5-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_psr.c