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crypto: qat - fix configuration of iov threads
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Mon, 12 Oct 2020 20:38:20 +0000 (21:38 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 30 Oct 2020 06:34:47 +0000 (17:34 +1100)
commitc4e8428673425c5b0c7280387c5cb35d60959b97
treedd09074448fc2c8aa081dbe6772fcf66a01f79e3
parent70b9bd3929da903d54dbd7d1ca2465333077cfd9
crypto: qat - fix configuration of iov threads

The number of AE2FUNC_MAP registers is different in every QAT device
(c62x, c3xxx and dh895xcc) although the logic and the register offsets
are the same across devices.

This patch separates the logic that configures the iov threads in a
common function that takes as input the number of AE2FUNC_MAP registers
supported by a device. The function is then added to the
adf_hw_device_data structure of each device, and called with the
appropriate parameters.

The configure iov thread logic is added to a new file,
adf_gen2_hw_data.c, that is going to contain code that is shared across
QAT GEN2 devices.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.h
drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.h
drivers/crypto/qat/qat_common/Makefile
drivers/crypto/qat/qat_common/adf_accel_devices.h
drivers/crypto/qat/qat_common/adf_gen2_hw_data.c [new file with mode: 0644]
drivers/crypto/qat/qat_common/adf_gen2_hw_data.h [new file with mode: 0644]
drivers/crypto/qat/qat_common/adf_sriov.c
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h