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[NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)
authorIvan A. Kosarev <ikosarev@accesssoftek.com>
Sat, 2 Jun 2018 16:26:42 +0000 (16:26 +0000)
committerIvan A. Kosarev <ikosarev@accesssoftek.com>
Sat, 2 Jun 2018 16:26:42 +0000 (16:26 +0000)
commitc5b2db16de11bbc79a9a7f193d0dde09efad4b17
tree7746a451a0cf4fb641dcee1831f5634ed5106384tree | snapshot
parent5d9c754b87561be7974790a3ba2d8b15241b0ca8commit | diff
[NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)

We currently support them only in AArch64. The NEON Reference,
however, says they are 'ARMv7, ARMv8' intrinsics.

Differential Revision: https://reviews.llvm.org/D47121

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333819 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IR/IntrinsicsARM.td diff | blob | history
lib/Target/ARM/ARMBaseInstrInfo.cpp diff | blob | history
lib/Target/ARM/ARMExpandPseudoInsts.cpp diff | blob | history
lib/Target/ARM/ARMISelDAGToDAG.cpp diff | blob | history
lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
lib/Target/ARM/ARMInstrNEON.td diff | blob | history
test/CodeGen/ARM/arm-vld1.ll [new file with mode: 0644] blob
external/llvm
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