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[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
authorCraig Topper <craig.topper@intel.com>
Mon, 27 Aug 2018 17:20:41 +0000 (17:20 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 27 Aug 2018 17:20:41 +0000 (17:20 +0000)
commitc5f26069a5df0db758e21cb45b19b70380072bf8
treeb8f44a3308da86cc629f933f2a75e7eb6d6b3f27
parent51c6d8b704b9394ed295f7d4931428b42cbf9e08
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.

We're using a 256-bit PACKUS to do the truncation, but that instruction operates on 128-bit lanes. So previously we shuffled first to rearrange the lanes. But that requires 2 shuffles. Instead we can shuffle after the PACKUS using a single VPERMQ. This matches what our normal LowerTRUNCATE code does when it uses PACKUS.

Differential Revision: https://reviews.llvm.org/D51284

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340757 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/prefer-avx256-wide-mul.ll
test/CodeGen/X86/vector-idiv-sdiv-256.ll
test/CodeGen/X86/vector-idiv-sdiv-512.ll
test/CodeGen/X86/vector-idiv-udiv-256.ll
test/CodeGen/X86/vector-idiv-udiv-512.ll