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(parent: 0141bea) | patch
ac/surface: align DCC size for surfaces that use tile swizzle
authorMarek Olšák <marek.olsak@amd.com>
Sat, 29 Jul 2017 15:19:01 +0000 (17:19 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 4 Aug 2017 00:10:04 +0000 (02:10 +0200)
commitc60c5accd1b20514dbbbbab7ac40004ad7122b44
treeed9892d93a617dae97d0185eedd53b21ab771926tree | snapshot
parent0141beadd8da5c857fe76f42a49ce379f0c700afcommit | diff
ac/surface: align DCC size for surfaces that use tile swizzle

Note that dcc_alignment = pipe_interleave_bytes * num_pipes * num_banks,
which is greater than the previous open-coded alignment.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/amd/common/ac_surface.c diff | blob | history
external/mesa
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