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drm/i915/gtt: reduce overzealous alignment constraints for GGTT
authorMatthew Auld <matthew.auld@intel.com>
Thu, 3 Mar 2022 10:02:29 +0000 (10:02 +0000)
committerMatthew Auld <matthew.auld@intel.com>
Tue, 8 Mar 2022 12:23:19 +0000 (12:23 +0000)
commitc64fa77dd4609cb8cd53fbb73b02434ae8212c7a
treeee2d27b98302ac210fc1052c8b7aa67488ea5326
parente4b3ee71ec2a6378ce9d4f4a3160b00921241f48
drm/i915/gtt: reduce overzealous alignment constraints for GGTT

Currently this will enforce both 2M alignment and padding for any LMEM
pages inserted into the GGTT. However, this was only meant to be applied
to the compact-pt layout with the ppGTT. For the GGTT we can reduce the
alignment and padding to 64K.

Bspec: 45015
Fixes: 87bd701ee268 ("drm/i915: enforce min GTT alignment for discrete cards")
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Robert Beckett <bob.beckett@collabora.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220303100229.839282-1-matthew.auld@intel.com
drivers/gpu/drm/i915/gt/intel_gtt.c