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arm64: dts: imx8mm-venice: Fix the SPI chipselect polarity
authorFabio Estevam <festevam@gmail.com>
Fri, 16 Jul 2021 13:28:45 +0000 (10:28 -0300)
committerShawn Guo <shawnguo@kernel.org>
Wed, 22 Sep 2021 02:48:56 +0000 (10:48 +0800)
commitc6fe862aa35c741b5b82cc5bda5f0c3cebf11bde
tree15c630d60fa9651f02a39054ba8a4ba1f28a48cc
parentbdd166bee8270534e42dc41793a43f3ec3b20dc9
arm64: dts: imx8mm-venice: Fix the SPI chipselect polarity

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:

[    4.854337] m25p80@0 enforce active low on chipselect handle

Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.

The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:

* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.

To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi