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target/loongarch: Implement Chip Configuraiton Version Register(0x0000)
authorSong Gao <gaosong@loongson.cn>
Mon, 27 Feb 2023 07:10:46 +0000 (15:10 +0800)
committerSong Gao <gaosong@loongson.cn>
Fri, 3 Mar 2023 01:37:30 +0000 (09:37 +0800)
commitc77432d0efc56273347eb5d8619935052e5ad0a6
treec1624b2fdda17195d67dc3f905b0b32a5c1be557tree | snapshot
parent5f4c96b779f9b556c3a0e925382a387c222df002commit | diff
target/loongarch: Implement Chip Configuraiton Version Register(0x0000)

According to the 3A5000 manual 4.1 implement Chip Configuration
Version Register(0x0000).

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230227071046.1445572-1-gaosong@loongson.cn>
target/loongarch/cpu.c diff | blob | history
target/loongarch/cpu.h diff | blob | history
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