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[NVPTX] allow address space inference for volatile loads/stores.
authorArtem Belevich <tra@google.com>
Tue, 24 Oct 2017 20:31:44 +0000 (20:31 +0000)
committerArtem Belevich <tra@google.com>
Tue, 24 Oct 2017 20:31:44 +0000 (20:31 +0000)
commitc79e8ba6d6cd530808830efc0c028dbfdc41d6a7
tree6d255a7a2a25644ce4db24775936677380bb2e50
parent58a8315339f848f5e1180a973d56b1808db6ceb3
[NVPTX] allow address space inference for volatile loads/stores.

If particular target supports volatile memory access operations, we can
avoid AS casting to generic AS. Currently it's only enabled in NVPTX for
loads and stores that access global & shared AS.

Differential Revision: https://reviews.llvm.org/D39026

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316495 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Analysis/TargetTransformInfo.h
include/llvm/Analysis/TargetTransformInfoImpl.h
lib/Analysis/TargetTransformInfo.cpp
lib/Target/NVPTX/NVPTXTargetTransformInfo.h
lib/Transforms/Scalar/InferAddressSpaces.cpp
test/CodeGen/NVPTX/ld-st-addrrspace.py [new file with mode: 0644]