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freedreno/ir3: Fix operand order for DSX/DSY
authorKristian H. Kristensen <hoegsberg@chromium.org>
Mon, 25 Mar 2019 21:04:20 +0000 (14:04 -0700)
committerKristian H. Kristensen <hoegsberg@chromium.org>
Tue, 26 Mar 2019 01:36:48 +0000 (18:36 -0700)
commitc7c432738a68d543dc1b73eae895ec4dfacd92b2
treeac038851d702059e9038f90cd1f6feb07c6ae9f8tree | snapshot
parenta752422bd42db4f4c445753657afea2d47988952commit | diff
freedreno/ir3: Fix operand order for DSX/DSY

Most cat5 instructions are constructed using ir3_SAM, which uses
regs[1] for the (sampler, tex) src. Not DSX/DSY though, so we look up
src1 and src2 differently for those two.

Fixes: 1dffb089 ("freedreno/ir3: fix sam.s2en encoding")
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
src/freedreno/ir3/ir3.c diff | blob | history
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