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powerpc/e6500: Optimize hugepage TLB misses
authorScott Wood <scottwood@freescale.com>
Fri, 3 Apr 2015 03:14:11 +0000 (22:14 -0500)
committerScott Wood <scottwood@freescale.com>
Wed, 3 Jun 2015 02:37:19 +0000 (21:37 -0500)
commitc89ca8ab7457d891abdffca7e6f5e74cef670d6d
tree18ac7b62e33d0b8c640ca3ea06404be150fa75e7tree | snapshot
parentfb326e9841b2000a8d1b115ccd7f5b3b61a4d123commit | diff
powerpc/e6500: Optimize hugepage TLB misses

Some workloads take a lot of TLB misses despite using traditional
hugepages.  Handle these TLB misses in the asm fastpath rather than
going through a bunch of C code.  With this patch I measured around a
5x speedup in handling hugepage TLB misses.

Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/mm/tlb_low_64e.S diff | blob | history
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