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author	Igor Breger <igor.breger@intel.com>
	Mon, 8 May 2017 09:03:37 +0000 (09:03 +0000)
committer	Igor Breger <igor.breger@intel.com>
	Mon, 8 May 2017 09:03:37 +0000 (09:03 +0000)
commit	ca7431c78f0abf0a410b3a15e3e606de4761081f
tree	ec02cc268a0d48de270367f48ebc7034cf711008	tree \| snapshot
parent	8d4aa1d832373da32c4b0f91624d8f66e6c5e5b8	commit \| diff

[GlobalISel][X86] G_MUL legalizer/selector support.

Summary:
G_MUL legalizer/selector/regbank support.
Use only Tablegen-erated instruction selection.
This patch dealing with legal operations only.

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: krytarowski, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D32698

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302410 91177308-0d34-0410-b5e6-96231b3b80d8

13 files changed:

lib/Target/X86/X86LegalizerInfo.cpp		diff \| blob \| history
lib/Target/X86/X86LegalizerInfo.h		diff \| blob \| history
test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/legalize-mul-v128.mir	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/legalize-mul-v256.mir	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/legalize-mul-v512.mir	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/mul-scalar.ll	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/mul-vec.ll	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/regbankselect-AVX2.mir	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/regbankselect-AVX512.mir	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir		diff \| blob \| history
test/CodeGen/X86/GlobalISel/select-mul-scalar.mir	[new file with mode: 0644]	blob
test/CodeGen/X86/GlobalISel/select-mul-vec.mir	[new file with mode: 0644]	blob

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