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mmc: core: fix issue with devfreq clock scaling
authorSahitya Tummala <stummala@codeaurora.org>
Fri, 12 Feb 2016 11:23:04 +0000 (16:53 +0530)
committerSubhash Jadavani <subhashj@codeaurora.org>
Tue, 31 May 2016 22:28:11 +0000 (15:28 -0700)
commitcc6df31db6b39446b338b61932b0fc8f614baf89
tree401d7a45fb491b0050513fd49c274739ae8d8d2d
parentd6a8e003e07e1ebafc596e051defb84194c527a2
mmc: core: fix issue with devfreq clock scaling

Due to recent DDR52 lower bus speed mode in clock scaling,
there is a mismatch between the clock frequencies used by
the devfreq framework and the MMC driver. Due to this, SDCC
clock is sometimes running at DDR25 and ICE clock is running
at 100MHz causing the power regression. Fix this mismatch by
initializing the frequencies properly during MMC resume based
on the current ios.clock.

CRs-Fixed: 974940
Change-Id: I09fe888d0fbd1fde3f6a6f32806315ddbb5bf6e1
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
drivers/mmc/core/core.c