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drm/i915: Add PSR2 selective update status registers and bits definitions
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 17 Jan 2019 20:55:47 +0000 (12:55 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Wed, 23 Jan 2019 00:33:12 +0000 (16:33 -0800)
commitcc8853f57e00511f46386c8e7910e00c5b2e58ea
tree8e79fe65691f1fc987f34846287eebf8a151b736
parent47c6cd54efde71b0e904cd41593978c109660430
drm/i915: Add PSR2 selective update status registers and bits definitions

This register contains how many blocks was sent in the past selective
updates.
Those registers are not kept set all the times but polling it after flip
can show the values corresponding to the last 8 frames.

v2: Improved macros(Dhinakaran)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190117205548.28378-3-jose.souza@intel.com
drivers/gpu/drm/i915/i915_reg.h