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(parent: df16b2e) | patch
[X86] Disable combineConcatVectors for vXi1 vectors.
authorCraig Topper <craig.topper@intel.com>
Thu, 18 Jul 2019 06:18:06 +0000 (06:18 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 18 Jul 2019 06:18:06 +0000 (06:18 +0000)
commitcd52761114781413c8d7ff750471de8aab3bcc7a
treed73d2e3c604c2b80657a2d84066a427ff8df0947tree | snapshot
parentdf16b2ed82c3250a028d5dfadfc3b51ce1912fd8commit | diff
[X86] Disable combineConcatVectors for vXi1 vectors.

I'm not convinced the code this calls is properly vetted for
vXi1 vectors. Experimental vector widening legalization testing
for D55251 is now hitting an assertion failure inside
EltsFromConsecutiveLoads. This is occurring from a v2i1 load
having a store size different than its VT size. Hopefully
this commit will keep such issues from happening.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366405 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll diff | blob | history
external/llvm
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