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drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer
authorManasi Navare <manasi.d.navare@intel.com>
Fri, 23 Mar 2018 17:24:16 +0000 (10:24 -0700)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 23 Mar 2018 21:58:13 +0000 (14:58 -0700)
commitcd96bea7ba90c45c8d1d315433c78021e56ec8c7
tree72a7a2bb6b8cb3eacbc992bd082217959f347dc3
parentc92f47b5ec977a31c72a3c3514ae460b3dd725ff
drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer

This table is used for voltage swing programming sequence during DDI
Buffer initialization for MG PHY DDI Buffers on Icelake.

v2 (from Paulo):
* Fix white space issues.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180323172419.24911-5-paulo.r.zanoni@intel.com
drivers/gpu/drm/i915/intel_ddi.c