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Hexagon (target/hexagon) Short-circuit more HVX single instruction packets
authorTaylor Simpson <tsimpson@quicinc.com>
Thu, 27 Apr 2023 23:00:05 +0000 (16:00 -0700)
committerTaylor Simpson <tsimpson@quicinc.com>
Thu, 18 May 2023 19:40:52 +0000 (12:40 -0700)
commitd05d5eebc77f607f96e582527e43908a274b2abf
treed9d9768a9998d9566a4b3420b9a0f5f545f5fee0
parentb85529854ee1a67a1169683a4446f2500a9c14c9
Hexagon (target/hexagon) Short-circuit more HVX single instruction packets

The generated helpers for HVX use pass-by-reference, so they can't
short-circuit when the reads/writes overlap.  The instructions with
overrides are OK because they use tcg_gen_gvec_*.

We add a flag has_hvx_helper to DisasContext and extend gen_analyze_funcs
to set the flag when the instruction is an HVX instruction with a
generated helper.

We add an override for V6_vcombine so that it can be short-circuited
along with a test case in tests/tcg/hexagon/hvx_misc.c

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230427230012.3800327-15-tsimpson@quicinc.com>
target/hexagon/gen_analyze_funcs.py
target/hexagon/gen_tcg_hvx.h
target/hexagon/translate.c
target/hexagon/translate.h
tests/tcg/hexagon/hvx_misc.c