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(parent: 2dc0224) | patch
[X86] Teach the execution domain fixing tables to use movlhps inplace of unpcklpd...
authorCraig Topper <craig.topper@intel.com>
Mon, 18 Sep 2017 04:40:58 +0000 (04:40 +0000)
committerCraig Topper <craig.topper@intel.com>
Mon, 18 Sep 2017 04:40:58 +0000 (04:40 +0000)
commitd28a1eae086444a9f6bd10df82bfadf85f78199e
tree7e7e8262d81d927fa0eec0e2074dc241993db755tree | snapshot
parent2dc0224dbfad7236d9007d03614d0a0044734af9commit | diff
[X86] Teach the execution domain fixing tables to use movlhps inplace of unpcklpd for the packed single domain.

MOVLHPS has a smaller encoding than UNPCKLPD in the legacy encodings. With VEX and EVEX encodings it doesn't matter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313509 91177308-0d34-0410-b5e6-96231b3b80d8
42 files changed:
lib/Target/X86/X86InstrInfo.cpp diff | blob | history
test/CodeGen/X86/avx-intrinsics-fast-isel.ll diff | blob | history
test/CodeGen/X86/avx-unpack.ll diff | blob | history
test/CodeGen/X86/avx512-cvt.ll diff | blob | history
test/CodeGen/X86/avx512-insert-extract.ll diff | blob | history
test/CodeGen/X86/avx512-shuffles/partial_permute.ll diff | blob | history
test/CodeGen/X86/avx512-shuffles/unpack.ll diff | blob | history
test/CodeGen/X86/build-vector-128.ll diff | blob | history
test/CodeGen/X86/build-vector-256.ll diff | blob | history
test/CodeGen/X86/build-vector-512.ll diff | blob | history
test/CodeGen/X86/buildvec-insertvec.ll diff | blob | history
test/CodeGen/X86/clear_upper_vector_element_bits.ll diff | blob | history
test/CodeGen/X86/combine-fcopysign.ll diff | blob | history
test/CodeGen/X86/combine-or.ll diff | blob | history
test/CodeGen/X86/dagcombine-buildvector.ll diff | blob | history
test/CodeGen/X86/haddsub-2.ll diff | blob | history
test/CodeGen/X86/haddsub-undef.ll diff | blob | history
test/CodeGen/X86/half.ll diff | blob | history
test/CodeGen/X86/horizontal-shuffle.ll diff | blob | history
test/CodeGen/X86/i64-to-float.ll diff | blob | history
test/CodeGen/X86/masked_memop.ll diff | blob | history
test/CodeGen/X86/merge-consecutive-loads-128.ll diff | blob | history
test/CodeGen/X86/sse-schedule.ll diff | blob | history
test/CodeGen/X86/sse2-intrinsics-fast-isel.ll diff | blob | history
test/CodeGen/X86/sse2-schedule.ll diff | blob | history
test/CodeGen/X86/sse2.ll diff | blob | history
test/CodeGen/X86/sse3-avx-addsub-2.ll diff | blob | history
test/CodeGen/X86/sse41.ll diff | blob | history
test/CodeGen/X86/vec_fp_to_int.ll diff | blob | history
test/CodeGen/X86/vec_insert-2.ll diff | blob | history
test/CodeGen/X86/vec_int_to_fp.ll diff | blob | history
test/CodeGen/X86/vector-half-conversions.ll diff | blob | history
test/CodeGen/X86/vector-shuffle-128-v2.ll diff | blob | history
test/CodeGen/X86/vector-shuffle-128-v4.ll diff | blob | history
test/CodeGen/X86/vector-shuffle-256-v4.ll diff | blob | history
test/CodeGen/X86/vector-shuffle-combining.ll diff | blob | history
test/CodeGen/X86/vector-shuffle-variable-128.ll diff | blob | history
test/CodeGen/X86/vector-shuffle-variable-256.ll diff | blob | history
test/CodeGen/X86/vector-truncate-combine.ll diff | blob | history
test/CodeGen/X86/vselect.ll diff | blob | history
test/CodeGen/X86/widen_extract-1.ll diff | blob | history
test/CodeGen/X86/xop-mask-comments.ll diff | blob | history
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