Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20170914' into staging
target-arm queue:
* v7M: various code cleanups
* v7M: set correct BFSR bits on bus fault
* v7M: clear exclusive monitor on reset and exception entry/exit
* v7M: don't apply priority mask to negative priorities
* zcu102: support 'secure' and 'virtualization' machine properties
* aarch64: fix ERET single stepping
* gpex: implement PCI INTx routing
* mps2-an511: fix UART overflow interrupt line wiring
# gpg: Signature made Thu 14 Sep 2017 18:50:48 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-
20170914:
mps2-an511: Fix wiring of UART overflow interrupt lines
hw/pci-host/gpex: Implement PCI INTx routing
hw/arm/virt: Set INTx/gsi mapping
hw/pci-host/gpex: Set INTx index/gsi mapping
target/arm: Avoid an extra temporary for store_exclusive
AArch64: Fix single stepping of ERET instruction
xlnx-zcu102: Mark the EP108 machine as deprecated
xlnx-zcu102: Add a machine level virtualization property
xlnx-zcu102: Add a machine level secure property
xlnx-zcu102: Manually create the machines
xlnx-ep108: Rename to ZCU102
target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit()
target/arm: Add and use defines for EXCRET constants
target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit()
nvic: Don't apply group priority mask to negative priorities
target/arm: Get PRECISERR and IBUSERR the right way round
target/arm: Clear exclusive monitor on v7M reset, exception entry/exit
target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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