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drm/i915/dg2: Memory latency values from pcode must be doubled
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 20 Aug 2021 22:57:10 +0000 (15:57 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 25 Aug 2021 22:05:20 +0000 (15:05 -0700)
commitd3252e1a3b2bd93ad76ae381d8f1a4e4c0ea54cc
tree8ec927f0dbf6fa16f5aeefc920d11bee653e63ff
parent76a04cd9af1e0cd9043b3904faa3ee3dc600799e
drm/i915/dg2: Memory latency values from pcode must be doubled

The memory latency values returned by pcode on DG2 are in units of "2
usec" rather than 1 usec on all other platforms.  I.e., we need to
double the value returned by pcode to obtain the true latency value.

The bspec wording here was a bit ambiguous as to whether it wanted us to
multiply or divide the pcode value by two, but we confirmed offline with
the hardware team that we need to double the value the pcode gives us;
this change is intended to support a larger range of potential latency
values.

Bspec: 49326
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Harish Chegondi <harish.chegondi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210820225710.401136-1-matthew.d.roper@intel.com
drivers/gpu/drm/i915/intel_pm.c