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Propagate DAG node ordering during type legalization and instruction selection
authorJustin Holewinski <jholewinski@nvidia.com>
Wed, 20 Mar 2013 00:10:32 +0000 (00:10 +0000)
committerJustin Holewinski <jholewinski@nvidia.com>
Wed, 20 Mar 2013 00:10:32 +0000 (00:10 +0000)
commitd73dc544f5e37e6d58befc71e57da3c132804543
tree36c6db5ed73b78c591cf873be430a17f49f8f3fa
parent580f9c85fd7a3c90884ed7ee7c2d613923a53bb3
Propagate DAG node ordering during type legalization and instruction selection

A node's ordering is only propagated during legalization if (a) the new node does
not have an ordering (is not a CSE'd node), or (b) the new node has an ordering
that is higher than the node being legalized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177465 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
lib/CodeGen/SelectionDAG/LegalizeTypes.h
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
test/CodeGen/NVPTX/sched1.ll [new file with mode: 0644]
test/CodeGen/NVPTX/sched2.ll [new file with mode: 0644]
test/CodeGen/NVPTX/vector-loads.ll
test/CodeGen/X86/win_ftol2.ll