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author	Gadi Haber <gadi.haber@intel.com>
	Tue, 27 Jun 2017 15:05:13 +0000 (15:05 +0000)
committer	Gadi Haber <gadi.haber@intel.com>
	Tue, 27 Jun 2017 15:05:13 +0000 (15:05 +0000)
commit	d88e02ecb78799f2faa58fe3ebf2aaafdcaa359e
tree	83f869aa3a37e26bb4f14963377c53298a3511c1	tree \| snapshot
parent	06ed4a14fdcacacc12b31f6316efaab5620ffe85	commit \| diff

Updated and extended the information about each instruction in HSW and SNB to include the following data:
•static latency
•number of uOps from which the instructions consists
•all ports used by the instruction

Reviewers: 
RKSimon
zvi
aymanmus
m_zuckerman

Differential Revision: https://reviews.llvm.org/D33897

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306414 91177308-0d34-0410-b5e6-96231b3b80d8

33 files changed:

lib/Target/X86/X86SchedHaswell.td		diff \| blob \| history
lib/Target/X86/X86SchedSandyBridge.td		diff \| blob \| history
test/CodeGen/X86/avx-schedule.ll		diff \| blob \| history
test/CodeGen/X86/avx2-intrinsics-x86.ll		diff \| blob \| history
test/CodeGen/X86/avx2-schedule.ll		diff \| blob \| history
test/CodeGen/X86/avx2-vector-shifts.ll		diff \| blob \| history
test/CodeGen/X86/avx512-cmp.ll		diff \| blob \| history
test/CodeGen/X86/avx512-cvt.ll		diff \| blob \| history
test/CodeGen/X86/avx512-insert-extract.ll		diff \| blob \| history
test/CodeGen/X86/avx512-intrinsics-upgrade.ll		diff \| blob \| history
test/CodeGen/X86/avx512-mask-op.ll		diff \| blob \| history
test/CodeGen/X86/avx512-vec-cmp.ll		diff \| blob \| history
test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll		diff \| blob \| history
test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll		diff \| blob \| history
test/CodeGen/X86/bitcast-and-setcc-256.ll		diff \| blob \| history
test/CodeGen/X86/extractelement-legalization-store-ordering.ll		diff \| blob \| history
test/CodeGen/X86/fp128-i128.ll		diff \| blob \| history
test/CodeGen/X86/gather-addresses.ll		diff \| blob \| history
test/CodeGen/X86/half.ll		diff \| blob \| history
test/CodeGen/X86/illegal-bitfield-loadstore.ll		diff \| blob \| history
test/CodeGen/X86/mul-constant-i32.ll		diff \| blob \| history
test/CodeGen/X86/mul-constant-i64.ll		diff \| blob \| history
test/CodeGen/X86/pr32329.ll		diff \| blob \| history
test/CodeGen/X86/recip-fastmath.ll		diff \| blob \| history
test/CodeGen/X86/recip-fastmath2.ll		diff \| blob \| history
test/CodeGen/X86/sse-schedule.ll		diff \| blob \| history
test/CodeGen/X86/sse2-schedule.ll		diff \| blob \| history
test/CodeGen/X86/sse3-schedule.ll		diff \| blob \| history
test/CodeGen/X86/sse41-schedule.ll		diff \| blob \| history
test/CodeGen/X86/sse42-schedule.ll		diff \| blob \| history
test/CodeGen/X86/ssse3-schedule.ll		diff \| blob \| history
test/CodeGen/X86/vector-shift-ashr-512.ll		diff \| blob \| history
test/CodeGen/X86/vector-shuffle-512-v32.ll		diff \| blob \| history

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