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dmaengine: idxd: fix wq config registers offset programming
authorDave Jiang <dave.jiang@intel.com>
Tue, 27 Oct 2020 21:34:09 +0000 (14:34 -0700)
committerVinod Koul <vkoul@kernel.org>
Fri, 30 Oct 2020 08:40:27 +0000 (14:10 +0530)
commitd98793b5d4256faae76177178456214f55bc7083
treeeb6dbed5e736cacda803600d6e2a519e517615b9
parent3650b228f83adda7e5ee532e2b90429c03f7b9ec
dmaengine: idxd: fix wq config registers offset programming

DSA spec v1.1 [1] updated to include a stride size register for WQ
configuration that will specify how much space is reserved for the WQ
configuration register set. This change is expected to be in the final
gen1 DSA hardware. Fix the driver to use WQCFG_OFFSET() for all WQ
offset calculation and fixup WQCFG_OFFSET() to use the new calculated
wq size.

[1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html

Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators")
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/160383444959.48058.14249265538404901781.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/idxd/device.c
drivers/dma/idxd/idxd.h
drivers/dma/idxd/init.c
drivers/dma/idxd/registers.h