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[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded...
authorCraig Topper <craig.topper@gmail.com>
Sun, 8 May 2016 21:33:53 +0000 (21:33 +0000)
committerCraig Topper <craig.topper@gmail.com>
Sun, 8 May 2016 21:33:53 +0000 (21:33 +0000)
commitdba67a4fdb6b7b7dce9b959b6d7d2963b1c642b6
treee95b2052b69c7eb09e50a37fa53a7e1b4d82ba57tree | snapshot
parent605a46a88d23962288023fb2a2ae6eafe6b1b7e1commit | diff
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268884 91177308-0d34-0410-b5e6-96231b3b80d8
14 files changed:
lib/Target/X86/X86InstrAVX512.td diff | blob | history
lib/Target/X86/X86InstrInfo.cpp diff | blob | history
lib/Target/X86/X86InstrSSE.td diff | blob | history
test/CodeGen/X86/avx512-arith.ll diff | blob | history
test/CodeGen/X86/avx512-calling-conv.ll diff | blob | history
test/CodeGen/X86/avx512-vec-cmp.ll diff | blob | history
test/CodeGen/X86/avx512vbmivl-intrinsics.ll diff | blob | history
test/CodeGen/X86/avx512vl-intrinsics.ll diff | blob | history
test/CodeGen/X86/avx512vl-vbroadcast.ll diff | blob | history
test/CodeGen/X86/fma_patterns.ll diff | blob | history
test/CodeGen/X86/masked_memop.ll diff | blob | history
test/CodeGen/X86/vector-shuffle-128-v2.ll diff | blob | history
test/CodeGen/X86/vector-tzcnt-128.ll diff | blob | history
test/CodeGen/X86/vector-tzcnt-256.ll diff | blob | history
external/llvm
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