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[X86][SSE]] Lower BUILD_VECTOR with repeated elts as BUILD_VECTOR + VECTOR_SHUFFLE
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 3 Apr 2017 21:06:51 +0000 (21:06 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 3 Apr 2017 21:06:51 +0000 (21:06 +0000)
commitdc4f56dd52997382782a1adad09af41f94e6ddae
tree00ed925fbbfabb3b4a732d043264e8832690ab3d
parentd1815f3bc324641e3d25bbf4c332ae0463554469
[X86][SSE]] Lower BUILD_VECTOR with repeated elts as BUILD_VECTOR + VECTOR_SHUFFLE

It can be costly to transfer from the gprs to the xmm registers and can prevent loads merging.

This patch splits vXi16/vXi32/vXi64 BUILD_VECTORS that use the same operand in multiple elements into a BUILD_VECTOR with only a single insertion of each of those elements and then performs an unary shuffle to duplicate the values.

There are a couple of minor regressions this patch unearths due to some missing MOVDDUP/BROADCAST folds that I will address in a future patch.

Note: Now that vector shuffle lowering and combining is pretty good we should be reusing that instead of duplicating so much in LowerBUILD_VECTOR - this is the first of several patches to address this.

Differential Revision: https://reviews.llvm.org/D31373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299387 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/avx-intrinsics-fast-isel.ll
test/CodeGen/X86/avx-vbroadcast.ll
test/CodeGen/X86/avx2-vbroadcast.ll
test/CodeGen/X86/merge-consecutive-loads-128.ll
test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
test/CodeGen/X86/vec_fp_to_int.ll
test/CodeGen/X86/vec_int_to_fp.ll
test/CodeGen/X86/vector-sext.ll
test/CodeGen/X86/vector-shuffle-combining-xop.ll
test/CodeGen/X86/vshift-1.ll
test/CodeGen/X86/vshift-2.ll