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(parent: 1684d07) | patch
[NVPTX] Add intrinsics for shfl instructions.
authorJustin Lebar <jlebar@google.com>
Thu, 9 Jun 2016 20:04:08 +0000 (20:04 +0000)
committerJustin Lebar <jlebar@google.com>
Thu, 9 Jun 2016 20:04:08 +0000 (20:04 +0000)
commitdd9e8b3bcc2d804b55edf8af96f4bd05c4260d6d
treec2d8f806d3ad053ac0c2c3982ec3e9198e363609tree | snapshot
parent1684d07087892c66550a2039fa7472dc9313d3d4commit | diff
[NVPTX] Add intrinsics for shfl instructions.

Summary:
Currently clang emits these instructions via inline (volatile) asm in
the CUDA headers.  Switching to intrinsics will let the optimizer reason
across calls to these intrinsics.

Reviewers: tra

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D21160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272298 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IR/IntrinsicsNVVM.td diff | blob | history
lib/Target/NVPTX/NVPTXIntrinsics.td diff | blob | history
test/CodeGen/NVPTX/shfl.ll [new file with mode: 0644] blob
external/llvm
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