[AVX-512] Add support for lowering shuffles to VALIGND/VALIGNQ

[AVX-512] Add support for lowering shuffles to VALIGND/VALIGNQ

Summary: VALIGND and VALIGNQ are similar to PALIGNR but instead of working on a 128-bit lane they work on the entire vector register. This change leverages the shuffle rotate detection code used for PALIGNR to detect these cases.

Reviewers: delena, RKSimon

Subscribers: Farhana, llvm-commits

Differential Revision: https://reviews.llvm.org/D26297

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286709 91177308-0d34-0410-b5e6-96231b3b80d8