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hw/cxl: Fix out of bound array access
authorDmitry Frolov <frolov@swemel.ru>
Tue, 19 Sep 2023 10:19:25 +0000 (11:19 +0100)
committerMichael Tokarev <mjt@tls.msk.ru>
Thu, 21 Sep 2023 08:31:18 +0000 (11:31 +0300)
commitde5bbfc602ef1b9b79c494a914c6083a1a23cca2
tree0b113b4d364c64041b1af493431b1c70ff406c08
parent6ff359196d576606a1434145cf05f967a05c08fa
hw/cxl: Fix out of bound array access

According to cxl_interleave_ways_enc(), fw->num_targets is allowed to be up
to 16. This also corresponds to CXL r3.0 spec. So, the fw->target_hbs[]
array is iterated from 0 to 15. But it is statically declared of length 8.
Thus, out of bound array access may occur.

Fixes: c28db9e000 ("hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV")
Signed-off-by: Dmitry Frolov <frolov@swemel.ru>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Link: https://lore.kernel.org/r/20230913101055.754709-1-frolov@swemel.ru
Cc: qemu-stable@nongnu.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
include/hw/cxl/cxl.h