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ASoC: Intel: bytcr_rt5640: add MCLK support
authorIrina Tirdea <irina.tirdea@intel.com>
Fri, 12 Aug 2016 21:27:57 +0000 (16:27 -0500)
committerMark Brown <broonie@kernel.org>
Mon, 15 Aug 2016 14:14:57 +0000 (15:14 +0100)
commitdf1a2776a795848f4dbc7c0cb396158b43eb8aa3
treeddcd5d5cf15b8702744bb61b2089776d80b2dbd1tree | snapshot
parent59e8b6520c6e2e867b35bc402d9a3f28aef3b2bccommit | diff
ASoC: Intel: bytcr_rt5640: add MCLK support

Use platform clocks "pmc_plt_clk_3" when MCLK quirk is defined.
By default always enable the 19.2 MHz PLL.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Irina Tirdea <irina.tirdea@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/boards/bytcr_rt5640.c diff | blob | history
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