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[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
authorSam Parker <sam.parker@arm.com>
Mon, 18 Sep 2017 14:46:14 +0000 (14:46 +0000)
committerSam Parker <sam.parker@arm.com>
Mon, 18 Sep 2017 14:46:14 +0000 (14:46 +0000)
commitdf2a024df200fcc986d7f46adf57f2db7cff8bf7
tree8652a3c884c5c04ec28b8623e515bcee6de14babtree | snapshot
parent5a79f317ae8318445d3cd4141e80dabf02c28f7dcommit | diff
[AArch64] Add V8_2aOps feature to Cortex-A55 and 75

Add the missing hardware features the ProcA55 and ProcA75 feature.
These are already enabled via the target parser, but I had missed
them in the backend.

Differential Revision: https://reviews.llvm.org/D37974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313535 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64.td diff | blob | history
test/MC/AArch64/armv8.1a-lse.s diff | blob | history
test/MC/AArch64/crc.s diff | blob | history
test/MC/AArch64/ras-extension.s diff | blob | history
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