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perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY bit inside the guest
authorLike Xu <likexu@tencent.com>
Mon, 2 Aug 2021 07:08:50 +0000 (15:08 +0800)
committerPeter Zijlstra <peterz@infradead.org>
Wed, 4 Aug 2021 13:16:34 +0000 (15:16 +0200)
commitdf51fe7ea1c1c2c3bfdb81279712fdd2e4ea6c27
treea9c39906aad73f1a0132460c6decb5a274b32e30
parentf4b4b45652578357031fbbef7f7a1b04f6fa2dc3
perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY bit inside the guest

If we use "perf record" in an AMD Milan guest, dmesg reports a #GP
warning from an unchecked MSR access error on MSR_F15H_PERF_CTLx:

  [] unchecked MSR access error: WRMSR to 0xc0010200 (tried to write 0x0000020000110076) at rIP: 0xffffffff8106ddb4 (native_write_msr+0x4/0x20)
  [] Call Trace:
  []  amd_pmu_disable_event+0x22/0x90
  []  x86_pmu_stop+0x4c/0xa0
  []  x86_pmu_del+0x3a/0x140

The AMD64_EVENTSEL_HOSTONLY bit is defined and used on the host,
while the guest perf driver should avoid such use.

Fixes: 1018faa6cf23 ("perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled")
Signed-off-by: Like Xu <likexu@tencent.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Tested-by: Kim Phillips <kim.phillips@amd.com>
Tested-by: Liam Merwick <liam.merwick@oracle.com>
Link: https://lkml.kernel.org/r/20210802070850.35295-1-likexu@tencent.com
arch/x86/events/perf_event.h