OSDN Git Service

[RISCV] Add vector integer mul/mulh/div/rem ISel patterns
authorFraser Cormack <fraser@codeplay.com>
Mon, 4 Jan 2021 10:41:49 +0000 (10:41 +0000)
committerFraser Cormack <fraser@codeplay.com>
Wed, 6 Jan 2021 09:24:07 +0000 (09:24 +0000)
commite130dea92a8ab477685469df261e3ecc72593525
treed7ccb78137fed568e317da74196d1f430bf84fbf
parent979228f120f4aa1265648b1c06f65a84bcca1ed6
[RISCV] Add vector integer mul/mulh/div/rem ISel patterns

There is no test coverage for the mulhs or mulhu patterns as I can't get
the DAGCombiner to generate them for scalable vectors. There are a few
places in that still need updating for that to work. I left the patterns
in regardless as they are correct.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94073
llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv64.ll [new file with mode: 0644]