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(parent: 4368c16) | patch
Reapply "AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics"
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 19 Jun 2019 19:55:27 +0000 (19:55 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 19 Jun 2019 19:55:27 +0000 (19:55 +0000)
commite1eedb66023d4f90b7a46d6703ddf8ef4574d47a
treec6c2484df7c964842552a6efafcb2940ed226efctree | snapshot
parent4368c1672052f456920c243ee65f9150b3546e43commit | diff
Reapply "AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics"

This reapplies r363678, using the correct chain for the CopyToReg for
v0. glueCopyToM0 counterintuitively changes the operands of the
original node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363870 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
include/llvm/IR/IntrinsicsAMDGPU.td diff | blob | history
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp diff | blob | history
lib/Target/AMDGPU/DSInstructions.td diff | blob | history
lib/Target/AMDGPU/SIISelLowering.cpp diff | blob | history
lib/Target/AMDGPU/SIInsertWaitcnts.cpp diff | blob | history
lib/Target/AMDGPU/SIInstrInfo.cpp diff | blob | history
lib/Target/AMDGPU/SIMachineFunctionInfo.h diff | blob | history
test/CodeGen/AMDGPU/gws-hazards.mir [new file with mode: 0644] blob
test/CodeGen/AMDGPU/insert-skips-gws.mir [new file with mode: 0644] blob
test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll [new file with mode: 0644] blob
test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll [new file with mode: 0644] blob
test/CodeGen/AMDGPU/tail-duplication-convergent.ll diff | blob | history
external/llvm
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