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[RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvanced
authorShiva Chen <shiva0217@gmail.com>
Fri, 18 May 2018 06:42:21 +0000 (06:42 +0000)
committerShiva Chen <shiva0217@gmail.com>
Fri, 18 May 2018 06:42:21 +0000 (06:42 +0000)
commite27401501e0d6f407c45ab7bc4c1b1e1c54f0356
tree39b366ab7a1f8ffd15cd37067b6b0f0ff2cd00da
parent5f0ee1d59d6503e8dc5f028b7ffaad46e502a0ec
[RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvanced

For RISCV branch instructions, we need to preserve relocation types when linker
relaxation enabled, so then linker could modify offset when the branch offsets
changed.

We preserve relocation types by define shouldForceRelocation.
IsResolved return by evaluateFixup will always false when shouldForceRelocation
return true. It will make RISCV MC Branch Relaxation always relax 16-bit
branches to 32-bit form, even if the symbol actually could be resolved.

To avoid 16-bit branches always relax to 32-bit form when linker relaxation
enabled, we add a new parameter WasForced to indicate that the symbol actually
couldn't be resolved and not forced by shouldForceRelocation return true.

RISCVAsmBackend::fixupNeedsRelaxationAdvanced could relax branches with
unresolved symbols by (!IsResolved && !WasForced).

RISCV MC Branch Relaxation is needed because RISCV could perform 32-bit
to 16-bit transformation in MC layer.

Differential Revision: https://reviews.llvm.org/D46350

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332696 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/MC/MCAsmBackend.h
include/llvm/MC/MCAssembler.h
lib/MC/MCAsmBackend.cpp
lib/MC/MCAssembler.cpp
lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
test/MC/RISCV/compressed-relocations.s
test/MC/RISCV/rv32-relaxation.s
test/MC/RISCV/rv64-relaxation.s