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AMDGPU: Divergence-driven selection of scalar buffer load intrinsics
authorNicolai Haehnle <nhaehnle@gmail.com>
Fri, 30 Nov 2018 22:55:38 +0000 (22:55 +0000)
committerNicolai Haehnle <nhaehnle@gmail.com>
Fri, 30 Nov 2018 22:55:38 +0000 (22:55 +0000)
commite3924b1c15606bb5bf98392e0c20e731b4965311
tree80d98ffe7cc5917864732151702520d4e8d4b683
parent37b386de2131627f2fcb4efd062cc7a09a9ebc1a
AMDGPU: Divergence-driven selection of scalar buffer load intrinsics

Summary:
Moving SMRD to VMEM in SIFixSGPRCopies is rather bad for performance if
the load is really uniform. So select the scalar load intrinsics directly
to either VMEM or SMRD buffer loads based on divergence analysis.

If an offset happens to end up in a VGPR -- either because a floating
point calculation was involved, or due to other remaining deficiencies
in SIFixSGPRCopies -- we use v_readfirstlane.

There is some unrelated churn in tests since we now select MUBUF offsets
in a unified way with non-scalar buffer loads.

Change-Id: I170e6816323beb1348677b358c9d380865cd1a19

Reviewers: arsenm, alex-t, rampitec, tpr

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D53283

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348050 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIISelLowering.cpp
lib/Target/AMDGPU/SIISelLowering.h
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstrInfo.h
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
test/CodeGen/AMDGPU/smrd-fold-offset.mir
test/CodeGen/AMDGPU/smrd.ll