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pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant
authorMika Westerberg <mika.westerberg@linux.intel.com>
Mon, 24 Sep 2018 14:32:11 +0000 (17:32 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 25 Sep 2018 10:48:15 +0000 (12:48 +0200)
commite50d95e2ad1266f8d3fcdf0724f03dbdffd400aa
treedf2ba3b4c9b71a6ef48c889510340a118fa46497
parentb85bfa246efd24ea3fdb5ee949c28e3110c6d299
pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant

It turns out the HOSTSW_OWN register offset is different between LP and
H variants. The latter should use 0xc0 instead so fix that.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=199911
Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support")
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/intel/pinctrl-cannonlake.c