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RA: Remove assert on empty live intervals
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 21 Jul 2017 23:56:13 +0000 (23:56 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 21 Jul 2017 23:56:13 +0000 (23:56 +0000)
commite59b7e46c1b5e38b0e16b80f1a12c234d78f9a35
tree4e134826e5677da4991eb4d69d7cb26c3506680ftree | snapshot
parentaed2034ae4d509ea98e5e4aeb1246a8b8ba5309ecommit | diff
RA: Remove assert on empty live intervals

This is possible if there is an undef use when
splitting the vreg during spilling.

Fixes bug 33620.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308808 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/RegAllocBase.cpp diff | blob | history
test/CodeGen/AMDGPU/spill-empty-live-interval.mir [new file with mode: 0644] blob
external/llvm
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