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[X86] Stop promoting vector and/or/xor/andn to vXi64.
authorCraig Topper <craig.topper@intel.com>
Fri, 26 Oct 2018 17:21:26 +0000 (17:21 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 26 Oct 2018 17:21:26 +0000 (17:21 +0000)
commite6fdc842f78352a916d688f3bf2f28b1424a53fd
treee9ae0c6f64c3ac6b66fe242672afd2687f91243b
parent39e6c05285c6a7a1e35d9325fdb4778226ab933e
[X86] Stop promoting vector and/or/xor/andn to vXi64.

These promotions add additional bitcasts to the SelectionDAG that can pessimize computeKnownBits/computeNumSignBits. It also seems to interfere with broadcast formation.

This patch removes the promotion and adds isel patterns instead.

The increased table size is more than I would like, but hopefully we can find some canonicalizations or other tricks to start pruning out patterns going forward.

Differential Revision: https://reviews.llvm.org/D53268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345408 91177308-0d34-0410-b5e6-96231b3b80d8
29 files changed:
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrFragmentsSIMD.td
lib/Target/X86/X86InstrSSE.td
lib/Target/X86/X86InstrXOP.td
test/CodeGen/X86/avx512-arith.ll
test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
test/CodeGen/X86/avx512-intrinsics-upgrade.ll
test/CodeGen/X86/avx512-logic.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/avx512-schedule.ll
test/CodeGen/X86/avx512-select.ll
test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
test/CodeGen/X86/bitcast-setcc-128.ll
test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
test/CodeGen/X86/movmsk-cmp.ll
test/CodeGen/X86/psubus.ll
test/CodeGen/X86/sat-add.ll
test/CodeGen/X86/unfold-masked-merge-vector-variablemask-const.ll
test/CodeGen/X86/vec-copysign-avx512.ll
test/CodeGen/X86/vector-bitreverse.ll
test/CodeGen/X86/vector-lzcnt-512.ll
test/CodeGen/X86/vector-reduce-and.ll
test/CodeGen/X86/vector-reduce-or.ll
test/CodeGen/X86/vector-reduce-xor.ll
test/CodeGen/X86/vector-rotate-512.ll
test/CodeGen/X86/vector-trunc-math.ll
test/CodeGen/X86/vector-tzcnt-512.ll