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ARM: l2c: highbank: remove explicit SMI call in L2 cache initialisation
authorRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 17 Mar 2014 22:42:48 +0000 (22:42 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 29 May 2014 23:49:18 +0000 (00:49 +0100)
commite761f6f332afe3356714a0d0eaf5ec1ebd8aab50
tree11a5bf3c2266f0d63c5bbd8def3e209fea9d091f
parent0074fb2c9e75acfdea391e6962c4be98444b4792
ARM: l2c: highbank: remove explicit SMI call in L2 cache initialisation

Now that highbank uses the write_sec method, we don't need to enable
the L2 cache in SoC specific code; this can be done via the normal
mechanisms in the L2C code.

Checking with Rob Herring:
> > Can we kill the "highbank_smc1(0x102, 0x1);" here? That means
> > l2x0_of_init() will see the L2 cache disabled, and will try to enable
> > it via the write_sec hook, so it should do the right thing.
>
> Yes, that should work. You should be able to just call l2x0_of_init
> unconditionally. The condition was really to just avoid the smc on
> Midway which does get handled on h/w, but not if running virtualized.

So also drop the DT check too.  I'm leaving the config check in place
so that if L2 is disabled, the write_sec hook can be optimised away.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-highbank/highbank.c