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(parent: e29d253) | patch
dwc3-msm: Add delay between consecutive register reads in while loop
authorVijayavardhan Vennapusa <vvreddy@codeaurora.org>
Fri, 28 Jul 2017 05:53:47 +0000 (11:23 +0530)
committerVijayavardhan Vennapusa <vvreddy@codeaurora.org>
Fri, 4 Aug 2017 11:35:55 +0000 (17:05 +0530)
commite9ee6bea1eb88e73bed98adadda314998103b424
tree58d0d89b778aa19bd925771e232bac61c873fa6ftree | snapshot
parente29d253ecf0480d4359ce41503741783d803ed6bcommit | diff
dwc3-msm: Add delay between consecutive register reads in while loop

Add some delay between two consecutive register reads in while loop
so that to avoid traffic congestion on NOCs.

Change-Id: I6efb8c91e0d07160ccce593a23898b2259cb1ebf
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
drivers/usb/dwc3/dwc3-msm.c diff | blob | history
Mirror: https://github.com/0ranko0P/kernel_xiaomi_msm8998/
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