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crypto: octeontx2 - add support to map LMTST region for CN10K
authorSrujana Challa <schalla@marvell.com>
Tue, 25 May 2021 11:27:16 +0000 (16:57 +0530)
committerHerbert Xu <herbert@gondor.apana.org.au>
Thu, 3 Jun 2021 12:24:05 +0000 (20:24 +0800)
commiteb33cd9116b2f1d193352c77bd829b61b1249b00
tree66e89d44729256887352470abb26e04ddcf62d32
parent4cd8c3152edeb0a580e0552317606a1f90bc59ab
crypto: octeontx2 - add support to map LMTST region for CN10K

On CN10K platform transmit/receive buffer alloc and free from/to
hardware had changed to support burst operation. Whereas pervious
silicon's only support single buffer free at a time.
To Support the same firmware allocates a DRAM region for each PF/VF for
storing LMTLINES. These LMTLINES are used to send CPT commands to HW.
PF/VF LMTST region is accessed via BAR4. PFs LMTST region is followed
by its VFs mbox memory. The size of region varies from 2KB to 256KB
based on number of LMTLINES configured.

This patch adds support for mapping of PF/VF LMTST region.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/marvell/octeontx2/Makefile
drivers/crypto/marvell/octeontx2/cn10k_cpt.c [new file with mode: 0644]
drivers/crypto/marvell/octeontx2/cn10k_cpt.h [new file with mode: 0644]
drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
drivers/crypto/marvell/octeontx2/otx2_cptlf.h
drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c