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i965: Fix depth field setting in surface state for raw buffer on Gen7/8
authorZhenyu Wang <zhenyuw@linux.intel.com>
Tue, 7 Apr 2015 05:48:38 +0000 (13:48 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 8 Apr 2015 05:20:17 +0000 (13:20 +0800)
commiteb51c6d55ff8b91497bd81f48f95e6bbe863a3e0
tree41d5dc8c7807fa484ab4e0db1baa8df46547b174
parent6b722c390b484485b3be60057782ee19583a82d1
i965: Fix depth field setting in surface state for raw buffer on Gen7/8

On Gen7/8 for RAW surface format, the depth field (surf[3]) in surface
state means [30:21] bits of number of entries which is different from
other surface format which uses [26:21] bits field.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
src/mesa/drivers/dri/i965/gen8_surface_state.c