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[X86][SSE] Add PACKUS support to combineVectorTruncation
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 3 Nov 2017 11:33:48 +0000 (11:33 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 3 Nov 2017 11:33:48 +0000 (11:33 +0000)
commiteb7c044ce99bf0576ab8017c0b63eb0f2d7e6c5b
tree9f1df58357b38d8a4f53abfbf5a7effcf37a2bea
parent6cd2a99eb6756292d2b78115f00d0fe9e1e35e23
[X86][SSE] Add PACKUS support to combineVectorTruncation

Similar to the existing code to lower to PACKSS, we can use PACKUS if the input vector's leading zero bits extend all the way to the packed/truncated value.

We have to account for pre-SSE41 targets not supporting PACKUSDW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317315 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/avg.ll
test/CodeGen/X86/combine-srl.ll
test/CodeGen/X86/vector-trunc.ll