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(parent: 86d916c) | patch
hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO
authorFrancisco Iglesias <francisco.iglesias@amd.com>
Thu, 31 Aug 2023 16:56:56 +0000 (17:56 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 8 Sep 2023 15:41:35 +0000 (16:41 +0100)
commitebfdc4942810905c44a59ee92f3d3809f40ee253
treeb82b42e4e242378a4aab1dc8dd4a964aa5463f74tree | snapshot
parent86d916c62145168120ec97a71404d91c0aa72835commit | diff
hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO

Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).

Signed-off-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230831165701.2016397-4-francisco.iglesias@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/misc/xlnx-versal-cfu.c diff | blob | history
include/hw/misc/xlnx-versal-cfu.h diff | blob | history
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