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target/arm/ptw.c: Account for FEAT_RME when applying {N}SW, SA bits
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 17 Jul 2023 10:05:08 +0000 (11:05 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 17 Jul 2023 10:05:08 +0000 (11:05 +0100)
commiteeb9578c36e78af6ee661f491e3f8744b1e0b6fb
tree6c22666dedc36077e371fb3ade4ce40d4d762c84
parent3f74da440ddad65dee5a22d63b2048a5ee16a5e2
target/arm/ptw.c: Account for FEAT_RME when applying {N}SW, SA bits

In get_phys_addr_twostage() the code that applies the effects of
VSTCR.{SA,SW} and VTCR.{NSA,NSW} only updates result->f.attrs.secure.
Now we also have f.attrs.space for FEAT_RME, we need to keep the two
in sync.

These bits only have an effect for Secure space translations, not
for Root, so use the input in_space field to determine whether to
apply them rather than the input is_secure. This doesn't actually
make a difference because Root translations are never two-stage,
but it's a little clearer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230710152130.3928330-4-peter.maydell@linaro.org
target/arm/ptw.c