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target-arm: Set correct syndrome for faults on MSR DAIF*, imm
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 29 May 2015 10:28:50 +0000 (11:28 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 29 May 2015 10:28:50 +0000 (11:28 +0100)
commitf2932df777dace044719dc2f394f5a5a8aa1b1cd
tree74a74d8be50f83bcba1b967a71da7e40e180f39b
parente3b1d480995f6e2e86ef062038e618c1234dbcf1
target-arm: Set correct syndrome for faults on MSR DAIF*, imm

If the SCTLR.UMA trap bit is set then attempts by EL0 to update
the PSTATE DAIF bits via "MSR DAIFSet, imm" and "MSR DAIFClr, imm"
instructions will raise an exception. We were failing to set
the syndrome information for this exception, which meant that
it would be reported as a repeat of whatever the previous
exception was. Set the correct syndrome information.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
target-arm/op_helper.c