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[X86] Allow cross-lane permutations for sub targets supporting AVX2.
authorJatin Bhateja <jatin.bhateja@gmail.com>
Wed, 6 Sep 2017 02:58:47 +0000 (02:58 +0000)
committerJatin Bhateja <jatin.bhateja@gmail.com>
Wed, 6 Sep 2017 02:58:47 +0000 (02:58 +0000)
commitf3b9c95869534080c663af21c9904ba94261dabb
tree75a26d6682ffa13501608d2fa908f28b0652892b
parent6c6e541016195cac366e51a0e85c6709f1ff06eb
[X86] Allow cross-lane permutations for sub targets supporting AVX2.

Summary:
Most instructions in AVX work “in-lane”, that is, each source element is applied only to other
elements of the same lane, thus a cross lane permutation is costly and needs more than one instrution.
AVX2 includes instructions to perform any-to-any permutation of words over a 256-bit register
and vectorized table lookup.

This should also Fix PR34369

Differential Revision: https://reviews.llvm.org/D37388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312608 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/vector-shuffle-256-v16.ll
test/CodeGen/X86/vector-shuffle-512-v32.ll
test/CodeGen/X86/vector-shuffle-combining-avx2.ll
test/CodeGen/X86/vector-shuffle-v48.ll
test/CodeGen/X86/x86-interleaved-access.ll